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? 2009 microchip technology inc. ds22196a-page 1 MCP6286 features ? low noise: 5.4 nv/ hz (typical) ? low quiescent current: 520 a (typical) ? rail-to-rail output ? wide supply voltage range: 2.2v to 5.5v ? gain bandwidth product: 3.5 mhz (typical) ? unity gain stable ? extended temperature range: -40c to +125c ? no phase reversal ? small package applications ? noise cancellation headphones ? cellular phones ? analog filters ? sensor conditioning ? portable instrumentation ? medical instrumentation ? battery powered systems design aids ? spice macro models ? filterlab ? software ? mindi ? circuit designer & simulator ? maps (microchip advanced part selector) ? analog demonstration and evaluation boards ? application notes typical application description the microchip technology inc. MCP6286 operational amplifier (op amp) has low noise (5.4 nv/ hz, typical), low power (520 a, typical) and rail-to-rail output operation. it is unity gain stable and has a gain bandwidth product of 3.5 mhz (typical). this device operates with a single suppl y voltage as low as 2.2v, while drawing low quiescent current. these features make the product well suited for single-supply, low noise, battery-powered applications. the MCP6286 op amp is offered in a space saving sot-23-5 package. it is designed with microchip?s advanced cmos process and available in the extended temperature rang e, with a power supply range of 2.2v to 5.5v. package types c 2 v out r 1 r 2 c 1 v in 47 nf 382 k 641 k 22 nf g = +1 v/v f p = 10 hz + ? MCP6286 second-order, low-pass butterworth filter 5 4 1 2 3 v dd v in? v in+ v ss v out MCP6286 sot-23-5 low noise, low power op amp
MCP6286 ds22196a-page 2 ? 2009 microchip technology inc. notes:
? 2009 microchip technology inc. ds22196a-page 3 MCP6286 1.0 electrical characteristics 1.1 absolute maximum ratings ? v dd ? v ss ........................................................................7.0v current at input pins .....................................................2 ma analog inputs (v in + , v in - )?? .......... v ss ? 1.0v to v dd + 1.0v all other inputs and outputs ......... v ss ? 0.3v to v dd + 0.3v difference input voltage ...................................... |v dd ? v ss | output short-circuit current .................................continuous current at output and supply pins ............................30 ma storage temperature ....................................-65c to +150c maximum junction temperature (t j ).......................... +150c esd protection on all pins (hbm; mm) ................ 4 kv; 400v ? notice: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rati ng only and functional operation of the device at those or any other conditions above those indicated in the operational listi ngs of this specification is not implied. exposure to maximu m rating conditions for extended periods may affect device reliability. ?? see 4.1.2 ?input voltage and current limits? dc electrical specifications electrical characteristics : unless otherwise indicated, v dd = +2.2v to +5.5v, v ss = gnd, t a = +25c, v cm = v dd /3, v out v dd /2, v l = v dd /2 and r l = 10 k to v l . (refer to figure 1-1 ). parameters sym min typ max units conditions input offset input offset voltage v os -1.5 ? +1.5 mv input offset drift with temperature v os / t a ?1?v/ct a = -40c to +125c power supply rejection ratio psrr 80 100 ? db input bias current and impedance input bias current i b ?1?pa ?50150pat a = +85c ? 1500 3000 pa t a = +125c input offset current i os ?1?pa common mode input impedance z cm ?10 13 ||20 ? ||pf differential input impedance z diff ?10 13 ||20 ? ||pf common mode common mode input voltage range v cmr v ss ? 0.3 ? v dd -1.2 v note 1 common mode rejection ratio cmrr 76 95 ? db v cm = -0.3v to 1.0v, v dd = 2.2v 80 100 ? db v cm = -0.3v to 4.3v, v dd = 5.5v open-loop gain dc open-loop gain (large signal) a ol 100 120 ? db 0.2v < v out <(v dd -0.2v) output maximum output voltage swing v ol, v oh v ss +15 ? v dd ?15 mv 0.5v input overdrive v ss +75 ? v dd ?75 mv 0.5v input overdrive r l = 2 k output short-circuit current i sc ?20?ma note 1: figure 2-12 shows how v cmr changes across temperature.
MCP6286 ds22196a-page 4 ? 2009 microchip technology inc. power supply supply voltage v dd 2.2 ? 5.5 v quiescent current per amplifier i q 300 520 700 a i o = 0, v dd = 2.2v 320 540 720 a i o = 0, v dd = 5.5v dc electrical specifi cations (continued) electrical characteristics : unless otherwise indicated, v dd = +2.2v to +5.5v, v ss = gnd, t a = +25c, v cm = v dd /3, v out v dd /2, v l = v dd /2 and r l = 10 k to v l . (refer to figure 1-1 ). parameters sym min typ max units conditions note 1: figure 2-12 shows how v cmr changes across temperature. ac electrical specifications electrical characteristics: unless otherwise indicated, t a = +25c, v dd = +2.2 to +5.5v, v ss = gnd, v cm = v dd /3, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. (refer to figure 1-1 ). parameters sym min typ max units conditions ac response gain bandwidth product gbwp ? 3.5 ? mhz phase margin pm ? 60 ? g = +1 v/v slew rate sr ? 2 ? v/s noise input noise voltage e ni ?1.0?v p-p f = 0.1 hz to 10 hz input noise voltage density e ni ?22?nv/ hz f = 10 hz ?5.4?nv/ hz f = 10 khz input noise current density i ni ?0.6?fa/ hz f = 1 khz temperature specifications electrical characteristics: unless otherwise indicated, v dd = +2.2v to +5.5v and v ss = gnd. parameters sym min typ max units conditions temperature ranges operating temperature range t a -40 ? +125 c note 1 storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 5l-sot-23 ja ?256?c/w note 1: the internal junction temperature (t j ) must not exceed the absolute ma ximum specification of +150c.
? 2009 microchip technology inc. ds22196a-page 5 MCP6286 1.2 test circuits the circuit used for most dc and ac tests is shown in figure 1-1 . it independently sets v cm and v out ; see equation 1-1 . the circuit?s common mode voltage is (v p +v m )/2, not v cm . v ost includes v os plus the effects of temperature, cmrr, psrr and a ol . equation 1-1: figure 1-1: ac and dc test circuit for most specifications. g dm r f r g ? = v cm v p 11 g n ? ? () v ref 1 g n ? () + = v out v ref v p v m ? () g dm v ost g n ++ = where: g dm = differential mode gain (v/v) g n = noise gain (v/v) v cm = op amp?s common mode input voltage (v) v ost = op amp?s total input offset voltage (mv) v ost v in? v in+ ? = g n 1 g dm + = v dd MCP6286 r g r f v out v m c b2 c l r l v l c b1 100 k 100 k r g r f v ref = v dd /2 v p 100 k 100 k 60 pf 10 k 1f 100 nf v in? v in+ c f 6.8 pf c f 6.8 pf
MCP6286 ds22196a-page 6 ? 2009 microchip technology inc. notes:
? 2009 microchip technology inc. ds22196a-page 7 MCP6286 2.0 typical performance curves note: unless otherwise indicated, t a = +25c, v dd = +2.2v to +5.5v, v ss = gnd, v cm = v dd /3, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. figure 2-1: input offset voltage. figure 2-2: input offset voltage drift. figure 2-3: input offset voltage vs. common mode input voltage with v dd = 5.5v. figure 2-4: input offset voltage vs. common mode input voltage with v dd = 2.2v. figure 2-5: input offset voltage vs. output voltage. figure 2-6: input offset voltage vs. power supply voltage with v cm = v cmr_l . note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purpose s only. the performance characteristics listed herein are not tested or guaranteed. in so me graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power suppl y range) and therefore outs ide the warranted range. 0% 2% 4% 6% 8% 10% 12% 14% -800 -600 -500 -400 -300 -200 -100 0 100 200 300 400 500 600 800 input offset voltage (v) percentage of occurrences 1360 samples 0% 5% 10% 15% 20% 25% 30% 35% 40% -3.5 -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 input offset drift with temperature (v/c) percentage of occurrences 1360 samples -800 -600 -400 -200 0 200 400 600 800 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 common mode input voltage (v) input offset voltage (v) t a = +125 c t a = +85c t a = +25c t a = -40c representative part v dd = 5.5v -800 -600 -400 -200 0 200 400 600 800 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 common mode input voltage (v) input offset voltage (v) t a = +125 c t a = +85c t a = +25c t a = -40c representative part v dd = 2.2v -500 -400 -300 -200 -100 0 100 200 300 400 500 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 output voltage (v) input offset voltage (v) v dd = 2.2v v dd = 5.5v -600 -400 -200 0 200 400 600 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 power supply voltage (v) input offset voltage (v) v cm = v cmr-l representative part t a = +125 c t a = +85c t a = +25c t a = -40c
MCP6286 ds22196a-page 8 ? 2009 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +2.2v to +5.5v, v ss = gnd, v cm = v dd /3, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. figure 2-7: input offset voltage vs. power supply voltage with v cm = v cmr_h . figure 2-8: input noise voltage density vs. frequency. figure 2-9: input noise voltage density vs. common mode input voltage. figure 2-10: cmrr, psrr vs. frequency. figure 2-11: cmrr, psrr vs. ambient temperature. figure 2-12: common mode input voltage headroom vs. ambient temperature. -600 -400 -200 0 200 400 600 1.52.02.53.03.54.04.55.05.56.0 power supply voltage (v) input offset voltage (v) v cm = v cmr-h representative part t a = +125c t a = +85c t a = +25c t a = -40c 1 10 100 1,000 1.e-1 1.e+0 1.e+1 1.e+2 1.e+3 1.e+4 1.e+5 1.e+6 frequency (hz) input noise voltage density (nv/ hz) 0.1 1 10 100 1k 10k 100k 1m 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 -0.3 0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6 3.9 4.2 4.5 common mode input voltage (v) input voltage noise density (nv/ hz) v dd = 5.5 v v dd = 2.2 v f = 10 khz 20 30 40 50 60 70 80 90 100 110 120 1 10 100 1000 10000 100000 1e+06 frequency (hz) cmrr, psrr (db) representative part cmrr psrr+ psrr- 1 10 100 1k 10k 100k 1m 75 80 85 90 95 100 105 110 -50 -25 0 25 50 75 100 125 ambient temperature (c) cmrr, psrr (db) psrr cmrr @ v dd = 5.5v @ v dd = 2.2v -0.30 -0.15 0.00 0.15 0.30 0.45 0.60 0.75 0.90 1.05 1.20 -50-25 0 255075100125 ambient temperature (c) common mode input voltage headroom (v) v cmr_l - v ss @ v dd = 2.2 v v ol - v ss @ v dd = 5.5 v v v v dd - v cmr_h @ v dd = 5.5v @ v dd = 2.2v
? 2009 microchip technology inc. ds22196a-page 9 MCP6286 note: unless otherwise indicated, t a = +25c, v dd = +2.2v to +5.5v, v ss = gnd, v cm = v dd /3, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. figure 2-13: input bias, offs et currents vs. ambient temperature. figure 2-14: input bias current vs. common mode input voltage. figure 2-15: quiescent current vs ambient temperature. figure 2-16: quiescent current vs. power supply voltage. figure 2-17: open-loop gain, phase vs. frequency. figure 2-18: gain bandwidth product, phase margin vs. common mode input voltage with v dd = 5.5v. 1 10 100 1000 10000 25 35 45 55 65 75 85 95 105 115 125 ambient temperature (c) input bias, offset currents (pa) input bias current input offset current v dd = 5.5v 0 200 400 600 800 1000 1200 1400 1600 0.00.51.01.52.02.53.03.54.04.55.05.5 common mode input votlage (v) input bias current (pa) v dd = 5.5v t a = +125c t a = +85c 250 300 350 400 450 500 550 600 650 700 -50-25 0 255075100125 ambient temperature (c) quiescent current (a) v dd = 5.5v v dd = 2.2v 0 100 200 300 400 500 600 700 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 power supply voltage (v) quiescent current (ua) t a = +125c t a = +85c t a = +25c t a = -40c -20 0 20 40 60 80 100 120 1.0e-01 1.0e+00 1.0e+01 1.0e+02 1.0e+03 1.0e+04 1.0e+05 1.0e+06 1.0e+07 frequency (hz) open-loop gain (db) -210 -180 -150 -120 -90 -60 -30 0 open-loop phase () open-loop gain open-loop phase v dd = 5.5v 0.1 1 10 100 1k 10k 100k 1m 10m 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -0.4 0.2 0.8 1.4 2.0 2.6 3.2 3.8 4.4 common mode input voltage (v) gain bandwidth product (mhz) 0 10 20 30 40 50 60 70 80 90 100 phase () phase margin gain bandwidth product v dd = 5.5v
MCP6286 ds22196a-page 10 ? 2009 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +2.2v to +5.5v, v ss = gnd, v cm = v dd /3, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf figure 2-19: gain bandwidth product, phase margin vs. common mode input voltage with v dd = 2.2v. figure 2-20: gain bandwidth product, phase margin vs. ambient temperature with v dd = 5.5v. figure 2-21: gain bandwidth product, phase margin vs. ambient temperature with v dd = 2.2v. figure 2-22: ouput short circuit current vs. power supply voltage. figure 2-23: output voltage swing vs. frequency. figure 2-24: output voltage headroom vs. output current. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -0.4 -0.1 0.2 0.5 0.8 1.1 common mode input voltage (v) gain bandwidth product (mhz) 0 10 20 30 40 50 60 70 80 90 100 phase () phase margin gain bandwidth product v dd = 2.2v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -50 -25 0 25 50 75 100 125 ambient temperature (c) gain bandwidth product (mhz) 40 45 50 55 60 65 70 75 80 85 90 phase () gain bandwidth product phase margin v dd = 5.5v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -50 -25 0 25 50 75 100 125 ambient temperature (c) gain bandwidth product (mhz) 40 45 50 55 60 65 70 75 80 85 90 phase () gain bandwidth product phase margin v dd = 2.2v 0 5 10 15 20 25 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 power supply voltage (v) output short circuit current (ma) t a = +125c t a = +85c t a = +25c t a = -40c 0.1 1 10 100 1000 10000 100000 1000000 10000000 frequency (hz) output voltage swing (v p-p ) v dd = 2.2v v dd = 5.5v 100 1k 10k 100k 1m 10m 1 10 100 1000 0.01 0.1 1 10 output current (ma) output voltage headroom (mv) v ol - v ss v dd - v oh
? 2009 microchip technology inc. ds22196a-page 11 MCP6286 note: unless otherwise indicated, t a = +25c, v dd = +2.2v to +5.5v, v ss = gnd, v cm = v dd /3, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. figure 2-25: output voltage headroom vs. ambient temperature. figure 2-26: slew rate vs. ambient temperature. figure 2-27: small signal non-inverting pulse response. figure 2-28: small signal inverting pulse response. figure 2-29: large signal non-inverting pulse response. figure 2-30: large signal inverting pulse response. 0 5 10 15 20 25 30 35 40 45 50 55 60 -50-25 0 255075100125 ambient temperature (c) output voltage headroom v dd - v oh, v ol - v ss (mv) v dd - v oh @ r l = 10k ? v ol - v ss @ r l = 10k ? v dd - v oh @ r l = 2k ? v ol - v ss @ r l = 2k ? 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 -50 -25 0 25 50 75 100 125 temperature (c) slew rate (v/s) falling edge, v dd = 5.5v rising edge, v dd = 5.5v falling edge, v dd = 2.2v rising edge, v dd = 2.2v time (1 s/div) output voltage (50 mv/div) v dd = 5.5v g = +1 v/v time (1 s/div) output voltage (50 mv/div) v dd = 5.5v g = -1 v/v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 time (5 s/div) output voltage (v) v dd = 5.5v g = +2 v/v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 time (5 s/div) output voltage (v) v dd = 5.5v g = -2 v/v
MCP6286 ds22196a-page 12 ? 2009 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /3, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. figure 2-31: the MCP6286 shows no phase reversal. figure 2-32: closed loop output impedance vs. frequency. figure 2-33: measured input current vs. input voltage (below v ss ). -1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 time (1 ms/div) input, output voltages (v) v dd = 5.5v g = +2 v/v v out v in 0.1 1 10 100 1000 10 100 1000 10000 100000 1e+06 1e+07 frequency (hz) closed loop output impedance ( ? ) g n : 101 v/v 11 v/v 1 v/v 10 100 1k 10k 100k 1m 10m 1 10 100 1000 10000 100000 1000000 10000000 100000000 1000000000 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 v in (v) -i in (a) 1m 100 10 1 100n 10n 1n 100 p 10p 1p 1m 100 10 1 100n 10n 1n 100 p 10p 1m 100 10 1 1p 100n 10n 1n 100p 10p 1m 100 10 1
? 2009 microchip technology inc. ds22196a-page 13 MCP6286 3.0 pin descriptions descriptions of the pins are listed in table 3-1 . table 3-1: pin function table 3.1 analog output the output pin is low-impedance voltage source. 3.2 analog inputs the non-inverting and inverting inputs are high-impedance cmos inputs with low bias currents. 3.3 power supply pins the positive power supply (v dd ) is 2.2v to 5.5v higher than the negative power supply (v ss ). for normal operation, the other pins are at voltages between v ss and v dd . typically, these parts are used in a single (positive) supply configuration. in this case, v ss is connected to ground and v dd is connected to the supply. v dd will need bypass capacitors. MCP6286 symbol description sot-23-5 1v out analog output 2v ss negative power supply 3v in + non-inverting input 4v in ? inverting input 5v dd positive power supply
MCP6286 ds22196a-page 14 ? 2009 microchip technology inc. notes:
? 2009 microchip technology inc. ds22196a-page 15 MCP6286 4.0 application information the MCP6286 op amp is manufactured using microchip?s state-of-the-art cmos process and is specifically designed for low-power, low-noise applications. 4.1 input 4.1.1 phase reversal the MCP6286 op amp is designed to prevent phase reversal when the input pins exceed the supply voltages. figure 2-31 shows the input voltage exceeding the supply voltage without any phase reversal. 4.1.2 input voltage and current limits the esd protection on the inputs can be depicted as shown in figure 4-1 . this structure was chosen to protect the input transistors and to minimize input bias current (i b ). the input esd diodes clamp the inputs when they try to go more than one diode drop below v ss . they also clamp any voltage that goes too far above v dd ; their breakdown voltage is high enough to allow normal operation and low enough to bypass esd events within the specified limits. figure 4-1: simplified analog input esd structures. in order to prevent damage and/or improper operation of these op amps, the circuit they are in must limit the voltages and currents at the v in+ and v in- pins (see absolute maximum ratings at the beginning of section 1.0 ?electri cal characteristics? ). figure 4-2 shows the recommended approach to protecting these inputs. the internal esd diodes prevent the input pins (v in+ and v in- ) from going too far below ground, and the resistors r 1 and r 2 limit the possible current drawn out of the input pins. diodes d 1 and d 2 prevent the input pins (v in+ and v in- ) from going too far above v dd . when implemented as shown, resistors r 1 and r 2 also limit the current through d 1 and d 2 . figure 4-2: protecting the analog inputs. it is also possible to connect the diodes to the left of the resistors r 1 and r 2 . in this case, the currents through the diodes d 1 and d 2 need to be limited by some other mechanism. the resistors th en serve as in-rush current limiters; the dc currents into the input pins (v in+ and v in- ) should be very small. a significant amount of current can flow out of the inputs when the common mode voltage (v cm ) is below ground (v ss ). (see figure 2-33 ). 4.1.3 normal operation the input stage of the MCP6286 op amp uses a pmos input stage. it operates at low common mode input voltage (v cm ), including ground. with this topology, the device operates with a v cm up to v dd - 1.2v and 0.3v below v ss . (see figure 2-12 ).the input offset voltage is measured at v cm = v ss ? 0.3v and v dd - 1.2v to ensure proper operation. for a unity gain buffer, since v out is the same voltage as the inverting input, v out must be maintained below v dd ?1.2v for correct operation. 4.2 rail-to-rail output the output voltage range of the MCP6286 op amp is v ss + 15 mv (minimum) and v dd ? 15 mv (maximum) when r l =10k is connected to v dd /2 and v dd = 5.5v. refer to figure 2-24 and figure 2-25 for more information. bond pad bond pad bond pad v dd v in + v ss input stage bond pad v in ? v 1 MCP6286 r 1 v dd d 1 r 1 > v ss ? (minimum expected v 1 ) 2ma r 2 > v ss ? (minimum expected v 2 ) 2ma v 2 r 2 d 2 r 3
MCP6286 ds22196a-page 16 ? 2009 microchip technology inc. 4.3 capacitive loads driving large capacitive loads can cause stability problems for voltage feedback op amps. as the load capacitance increases, the feedback loop?s phase margin decreases and the closed-loop bandwidth is reduced. this produces ga in peaking in the frequency response, with overshoot and ringing in the step response. while a unity-gain buffer (g = +1 v/v) is the most sensitive to capacitive loads, all gains show the same general behavior. when driving large capacitive loads with these op amps (e.g., > 100 pf when g = +1 v/v), a small series resistor at the output (r iso in figure 4-3 ) improves the feedback loop?s phase margin (stability) by making the output load resistive at higher frequencies. the bandwidth will be generally lower than the bandwidth with no capacitance load. figure 4-3: output resistor, r iso stabilizes large capacitive loads. figure 4-4 gives recommended r iso values for different capacitive loads and gains. the x-axis is the normalized load capacitance (c l /g n ), where g n is the circuit's noise gain. for non-inverting gains, g n and the signal gain are equal. for inverting gains, g n is 1+|signal gain| (e.g., -1 v/v gives g n = +2 v/v). figure 4-4: recommended r iso values for capacitive loads. after selecting r iso for your circuit, double check the resulting frequency response peaking and step response overshoot. modify r iso ?s value until the response is reasonable. bench evaluation and simulations with the MCP6286 spice macro model are very helpful. 4.4 supply bypass MCP6286 op amp?s power supply pin (v dd for single-supply) should have a local bypass capacitor (i.e., 0.01 f to 0.1 f) within 2 mm for good high frequency performance. it can use a bulk capacitor (i.e., 1 f or larger) within 100 mm to provide large, slow currents. this bulk capacitor can be shared with other analog parts. 4.5 pcb surface leakage in applications where low input bias current is critical, printed circuit board (pcb) surface leakage effects need to be considered. surf ace leakage is caused by humidity, dust or other contamination on the board. under low humidity conditions, a typical resistance between nearby traces is 10 12 . a 5v difference would cause 5 pa of current to flow; which is greater than the MCP6286 op amp?s bias current at +25c (1 pa, typical). the easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). the guard ring is biased at the same voltage as the sensitive pin. an example of this type of layout is shown in figure 4-5 . figure 4-5: example guard ring layout for inverting gain. 1. non-inverting gain and unity-gain buffer: a. connect the non-inverting pin (v in +) to the input with a wire that does not touch the pcb surface. b. connect the guard ring to the inverting input pin (v in ?). this biases the guard ring to the common mode input voltage. 2. inverting gain and transimpedance gain amplifiers (convert current to voltage, such as photo detectors): a. connect the guard ring to the non-inverting input pin (v in +). this biases the guard ring to the same reference voltage as the op amp (e.g., v dd /2 or ground). b. connect the inverting pin (v in ?) to the input with a wire that does not touch the pcb surface. v in r iso v out MCP6286 c l ? + 1 10 100 1000 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 normalized load capacitance; c l /g n (f) recommended r iso ( ? ) g n : 1 v/v 2 v/v 5 v/v v dd = 5.5 v r l = 10 k ? 10p 100p 1n 10n 0.1 1 guard ring v in ?v in + v ss
? 2009 microchip technology inc. ds22196a-page 17 MCP6286 4.6 application circuits 4.6.1 active lo w-pass filter the MCP6286 op amp?s low input bias current makes it possible for the designer to use larger resistors and smaller capacitors for active low-pass filter applications. however, as the resistance increases, the noise generated also increases. parasitic capacitances and the large value resistors could also modify the frequency response. these trade-offs need to be considered when selecting circuit elements. figure 4-6 and figure 4-7 show low-pass, second-order, butterworth filters with a cut-off frequency of 10 hz. the filter in figure 4-6 has a non-inverting gain of +1 v/v, and the filter in figure 4-7 has an inverting gain of -1 v/v. figure 4-6: second-order, low-pass butterworth filter with sallen-key topology. figure 4-7: second-order, low-pass butterwork filter wit h multiple-feedback topology. 4.6.2 photo detection the MCP6286 op amps can be used to easily convert the signal from a sensor that produces an output current (such as a photo diode) into a voltage (a transimpedance amplifier). th is is implemented with a single resistor (r 2 ) in the feedback loop of the amplifiers shown in figure 4-8 and figure 4-9 . the optional capacitor (c 2 ) sometimes provides stability for these circuits. a photodiode configured in the photovoltaic mode has zero voltage potential placed across it ( figure 4-8 ). in this mode, the light sensitivity and linearity is maximized, making it best suited for precision applications. the key amplif ier specifications for this application are: low input bias current, low noise, common mode input voltage range (including ground), and rail-to-rail output. figure 4-8: photovoltaic mode detector. in contrast, a photodiode that is configured in the photoconductive mode has a reverse bias voltage across the photo-sensing element ( figure 4-9 ). this decreases the diode capacitance, which facilitates high-speed operation (e.g., high-speed digital communications). the desi gn trade-off is increased diode leakage current and linearity errors. the op amp needs to have a wide gain bandwidth product (gbwp). figure 4-9: photoconductive mode detector. c 2 v out r 1 r 2 c 1 v in 47 nf 382 k 641 k 22 nf g = +1 v/v f p = 10 hz + ? MCP6286 c 2 v out r 1 r 3 c 1 v in r 2 v dd /2 g = -1 v/v f p = 10 hz 618 k 618 k 1.00 m 8.2 nf 47 nf ? + MCP6286 d 1 light v out v dd r 2 c 2 i d1 v out = i d1 *r 2 ? + MCP6286 d 1 light v out v dd r 2 c 2 i d1 v out = i d1 *r 2 v bias v bias < 0v ? + MCP6286
MCP6286 ds22196a-page 18 ? 2009 microchip technology inc. notes:
? 2009 microchip technology inc. ds22196a-page 19 MCP6286 5.0 design aids microchip provides the basic design tools needed for the MCP6286 op amp. 5.1 spice macro model the latest spice macro model for the MCP6286 op amp is available on the microchip web site at www.microchip.com. the model was written and tested in official orcad (cadenc e) owned pspice. for the other simulators, it may require translation. the model covers a wide aspect of the op amp's electrical specifications. not only does the model cover voltage, current, and resistance of the op amp, but it also covers the temperature and noise effects on the behavior of the op amp. the model has not been verified outside of the specification range listed in the op amp data sheet. the model behaviors under these conditions can not be guaran teed that it will match the actual op amp performance. moreover, the model is intended to be an initial design tool. bench testing is a very important part of any design and cannot be replaced with simulations. also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 5.2 filterlab ? software microchip?s filterlab ? software is an innovative software tool that simplifies analog active filter (using op amps) design. available at no cost from the microchip web site at www.m icrochip.com/filterlab, the filterlab design tool prov ides full schematic diagrams of the filter circuit with component values. it also outputs the filter circuit in spice format, which can be used with the macro model to simulate actual filter performance. 5.3 mindi? circuit designer & simulator microchip?s mindi? circuit designer & simulator aids in the design of various circuits useful for active filter, amplifier and power-management applications. it is a free online circuit designer & simulator available from the microchip web site at www.microchip.com/mindi. this interactive circuit designer & simulator enables designers to quickly generate circuit diagrams, simulate circuits. circuits developed using the mindi circuit designer & simulator can be downloaded to a personal computer or workstation. 5.4 microchip advanced part selector (maps) maps is a software tool that helps semiconductor professionals efficiently identify microchip devices that fit a particular design require ment. available at no cost from the microchip website at www.microchip.com/ maps, the maps is an overall selection tool for microchip?s product portfolio that includes analog, memory, mcus and dscs. using this tool you can define a filter to sort featur es for a parametric search of devices and export side-by-side technical comparison reports. helpful links are also provided for datasheets, purchase, and sampling of microchip parts. 5.5 analog demonstration and evaluation boards microchip offers a broad spectrum of analog demonstration and evaluat ion boards that are designed to help you achieve faster time to market. for a complete listing of these boards and their corresponding user?s guides and technical information, visit the microchip web si te at www.microchip.com/ analogtools. some boards that are especially useful are: ? mcp6xxx amplifier evaluation board 1 ? mcp6xxx amplifier evaluation board 2 ? mcp6xxx amplifier evaluation board 3 ? mcp6xxx amplifier evaluation board 4 ? active filter demo board kit ? 5/6-pin sot-23 evaluation board, p/n vsupev2 5.6 application notes the following microchip analog design note and application notes are available on the microchip web site at www.microchip.com/appnotes and are recommended as supplemental reference resources. ? adn003: ?select the right operational amplifier for your filtering circuits?, ds21821 ? an722: ?operational amplifier topologies and dc specifications?, ds00722 ? an723: ?operational amplifier ac specifications and applications?, ds00723 ? an884: ?driving capacitive loads with op amps?, ds00884 ? an990: ?analog sensor conditioning circuits ? an overview?, ds00990 ? an1177: ?op amp precision design: dc errors?, ds01177 ? an1228: ?op amp precision design: random noise?, ds01228 these application notes and others are listed in the design guide: ? ?signal chain design guide?, ds21825
MCP6286 ds22196a-page 20 ? 2009 microchip technology inc. notes:
? 2009 microchip technology inc. ds22196a-page 21 MCP6286 6.0 packaging information 6.1 package marking information 1 23 5 4 5-lead sot-23 example: xxnn 1 2 3 5 4 wenn legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e
MCP6286 ds22196a-page 22 ? 2009 microchip technology inc.

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? 2009 microchip technology inc. ds22196a-page 23 MCP6286 appendix a: revision history revision a (august 2009) ? original release of this document.
MCP6286 ds22196a-page 24 ? 2009 microchip technology inc. notes:
? 2009 microchip technology inc. ds22196a-page 25 MCP6286 product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . device: MCP6286t: single op amp (tape and reel) temperature range: e = -40c to +125c package: ot = plastic small outline transistor, 5-lead part no. x /xx package temperature range device examples: a) MCP6286t-e/ot: tape and reel, 5-ld sot-23 package
MCP6286 ds22196a-page 26 ? 2009 microchip technology inc. notes:
? 2009 microchip technology inc. ds22196a-page 27 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights. trademarks the microchip name and logo, th e microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are register ed trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, a pplication maestro, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, icepic, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, pickit, picdem, picdem.net, pictail, pic 32 logo, real ice, rflab, select mode, total endurance, tsharc, wiperlock and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2009, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperi pherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
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